This invention relates to the monolithic integration of an I.sup.2 L circuit comprising at least one bipolar analog circuit part as known from the technical journal "Valvo-Berichte" Vol. XVIII, No. 1/2 (April 1974), pp. 215 to 216. and more particularly to the monolithic integration of an I.sup.2 L circuit by employing the planar diffusion method in six masking steps.
Since, as is well known, analog circuits are operated by relatively high supply voltages, epitaxial layers of high specific resistance (e.g. 2-3.OMEGA.cm) and of great thickness (approx. 15 microns) are required. In so doing, however, the current gain values of the transistors which are required for the I.sup.2 L circuit and whose collectors are arranged on the semiconductor surface, are difficult to realize.